A flash memory has multiple memory cell arrays and reference cells. Writing of data in a memory cell array is accompanied by writing of reference data in a reference cell that is associated with the memory cell array. When the data is read, the current from the memory cell array and the current from the reference cell are compared. In between the writing operation and the reading operation, the loss of electric charge may occur in the memory cell array and in the reference cell with the lapse of time. As the data reading requires the balanced amount of charge loss between the memory cell and the reference cell, the writing operation should be done concurrently for the memory cell array and the reference cell.
Thus, once data is written to at least a part of the memory cell array, no other reference cell is available for writing another reference data therein as additional data is written to the memory cell array thereafter. That is the reason why additional data writing is often prohibited in the memory cell array. In order to enable the additional data writing operation in the flash memory, a refreshing circuit may be needed. However, the introduction of the refreshing circuit to the flash memory may bring a significant change to the architecture of the memory, and lead to an increase in the size of the flash memory.